1. Field of the Invention
The present invention relates to a semiconductor device and an input signal reception circuit that receives an input signal.
2. Description of Related Art
In recent years, the speed at which signals have been input to semiconductor devices has increased and amplitudes of the input signals have decreased. At the speed at which signals are input into semiconductor devices has increased, and as the amplitudes of the input signals have decreased, an input signal reception circuit has been provided with a differential circuit that outputs a signal corresponding to the logic level of an input signal based on the difference between a reference voltage and the voltage of the input signal so as to receive an input signal and output a signal corresponding to the logic level of the input signal to a subsequent circuit (for example, refer to Patent Literature 1 (JP2003-22698A, Publication) and Patent Literature 2 (JP11-202029A, Publication)).
The foregoing differential circuit needs to have excellent signal output characteristics such that it can output a signal corresponding to the logic level of an input signal at a high speed and that it can output a signal with a large amplitude.
As shown in FIG. 3 of Patent Literature 1, a differential circuit has a current mirror circuit composed of a pair of transistors and a differential pair composed of a pair of transistors whose polarity is different from the polarity of transistor which make up of the current mirror circuit. The signal output characteristics of the differential circuit, in which the logic level of the input signal is the high level and in which the logic level of the input signal is the low level are different, for example, depending on whether the current mirror circuit or the differential pair is make up of P-type transistors.
Thus, some input signal reception circuits are provided with a first differential circuit where the signal output characteristics in which the logic level of the input signal is the high level are superior to those in which the logic level of the input signal is the low level and a second differential circuit where the signal output characteristics in which the logic level of the input signal is the low level are superior to those in which the logic level of the input signal is the high level so as to accurately receive the input signal whose logic level is the high level and the input signal whose logic level is the low level.
In the foregoing input signal reception circuit that is provided with two differential circuits, the two differential circuits are always kept in the active state such that non-periodic input signals are always received. Thus, the input signal reception circuit that is provided with two differential circuits has a problem in which power consumption increases. This problem becomes more pronounced as the number of differential circuits that are kept in the active state increases.